Senior Staff Silicon Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE

As a Senior Staff SoC PnP Engineer, you will take ownership of advanced post-silicon analysis and optimization, driving improvements across power, thermal, and performance metrics for AMD's cutting-edge System-on-Chip (SoC) products.

AMD's SoC portfolio includes the Versal adaptive SoC family for embedded and AI applications, the Ryzen Embedded series, and high-performance processors like Ryzen and Threadripper, which feature innovative "chiplet" SoC designs. In this role, you will directly contribute to the validation and tuning of these industry-leading platforms, ensuring they deliver optimal efficiency and performance for a wide range of applications.

THE PERSON

You thrive in collaborative, cross-functional environments, working closely with architects, design engineers, validation teams, and marketing to deliver industry-leading SoC solutions. Your expertise enables you to balance power efficiency and performance, ensuring our products set new standards in the market.

KEY RESPONSIBILITIES

• Lead post-silicon PnP validation, including profiling and measurement of EDC/TDC, thermal dynamics, frequency scaling, and voltage droop characteristics.
• Conduct in-depth silicon debugging across power rails, telemetry systems, dynamic voltage scaling (DVS), and PMIC interactions.
• Optimize power management settings and firmware parameters to maximize performance and efficiency.
• Correlate silicon results with pre-silicon models, identify discrepancies, and propose actionable solutions.
• Plan and execute comprehensive post-silicon validation for power, performance, and thermal metrics (including PVT sweeps, Vmin/Fmax characterization, and transient droop analysis).
• Develop and automate data collection and analysis pipelines; create dashboards for KPI monitoring and regression tracking.
• Troubleshoot hardware, firmware, and driver issues impacting PnP; implement fusing and firmware adjustments to resolve gaps.
• Collaborate with architecture, design verification, firmware, and platform teams to identify root causes and drive fixes; author detailed tuning guides and documentation.

PREFERRED EXPERIENCE

• Proven experience in SoC silicon validation or PnP engineering.
• Strong Python scripting skills and hands-on lab debug expertise (oscilloscope, logic analyzer, PMIC tools).
• Solid understanding of CPU/GPU performance and power telemetry.
• Background in automotive, industrial, or high-reliability SoCs is highly desirable.

ACADEMIC CREDENTIALS

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline.

LOCATION:

Austin, TX

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AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.